Open Verification Library (OVL) Working Group
To define and deliver standard OVL LRM and libraries of assertion checkers to be used by design, integration and verification engineers to check for good/bad behavior in simulation, emulation and formal verification – provided in Verilog, System Verilog, VHDL, PSL, and SystemC.
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The OVL library of assertion checkers is intended to be used by design, integration, and verification engineers to check for good/bad behavior in simulation, emulation, and formal verification.
The Open Verification Library (OVL) Working Group is responsible for the definition and development of the standard OVL language reference manual and assertion-checker libraries.
OVL Version 2.8, released in December 2013, is the latest OVL release implemented in Verilog, VHDL, System Verilog and PSL (Verilog flavor).
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