PSS 3.1 Public Review Now Open

The Portable Stimulus Standard (PSS) 3.1 Draft Standard is available for public review, giving the design and verification community an opportunity to review the latest enhancements to PSS and provide feedback before its release.

PSS 3.1 is a focused release that builds on the capabilities of PSS 3.0, with updates concentrated in four key areas:

• A stronger constraint language – Enhancements that provide greater flexibility and control when defining constraints.
• More reusable libraries – Improvements that make it easier to create practical, reusable PSS libraries that can be shared across projects and teams.
• Greater control over generated target code – New capabilities that give models more control over what is produced for target implementations.
• Address spaces and registers – Updates that close gaps and strengthen modeling capabilities in the address and register layer.

The public review provides an opportunity for the industry to evaluate the specification and provide feedback before it is finalized. The Portable Stimulus Working Group invites comments and feedback through its Community Forum.

The document is available for download at Accellera's Drafts Under Public Review page. The public review period is open until September 30, 2026. For more information about PSS and the development of the standard, visit the Portable Stimulus Working Group page.

 

PSS Training Session 14 Now Available!

How Does PSS Make Register Modeling Portable Across Target Implementations?

In Session 14 of Accellera’s “Learning PSS” video series, Tom Fitzpatrick, PSS expert and charter member of Accellera’s Portable Stimulus Working Group, explores PSS registers and how register models can remain portable while being mapped to target-specific addresses and memory accesses.

In this session, you’ll learn:

• How to model registers using packed structs, including register fields, layouts, and endianness
• How PSS provides portable methods for reading, writing, and updating register fields
• How to organize individual registers into hierarchical register groups that reflect the hardware register map
• How to define and calculate register offsets, including registers organized in arrays and nested groups
• How to associate register groups with address regions and address handles
• How register references and offsets are translated into target memory accesses
• How packed layouts, register groups, offsets, and handles work together to create a portable register model

Watch Session 14 now and take the next step in your Portable Stimulus learning journey.

Continue the series next week with session 15, which will discuss PSS data coverage.

For details about PSS and other resources, visit the Portable Stimulus Working Group page.

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