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Accellera Systems Initiative Names Stan Krolikoski Recipient of 2013 Leadership Award

"Stan is a pioneer in our industry and has played an integral role in the development of EDA standards used worldwide," said Shishpal Rawat, Accellera Systems Initiative chair. "He has been engaged longer than any other individual in standards development, from the early days in VHDL, to the groundbreaking work he did with the Open SystemC Initiative, to the work he continues with us today such as the IP rights policy. We appreciate his many contributions to Accellera. It is exemplary leadership like his that makes Accellera the foremost standards development organization for the EDA and IP industry."

Award recognizes Krolikoski's vision, decades of contributions to EDA and IP Standards

Napa, Calif., USA, 30 May 2013 - Accellera Systems Initiative (www.accellera.org), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, has named Dr. Stanley Krolikoski as the recipient of its annual Leadership Award. The Award recognizes the vision, leadership and contribution to standards development, governance and promotional activities of the organization. The Award will be presented at ... More »

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Supporting Quotes: Accellera Systems Initiative Completes SystemC AMS 2.0 Standard for Mixed-Signal Design of Electronic Systems	19 Mar 2013
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Latest Media Coverage
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Accellera publishes SystemC-AMS 2.0 standard Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for more dynamic behaviors in the analog domain.	Tech Design Forum 20 Mar 2013
DVCon 2013: Engineers Question EDA Standards Leaders at Accellera "Town Hall" Meeting Do design and verification engineers care about EDA standards? If the Accellera Systems Initiative "Town Hall" meeting at DVCon 2013 Feb. 25 is any indication, the answer is an emphatic yes. A packed audience attended a lively, hour-long meeting in which non-stop questions were answered by Accellera and IEEE standards developers.	Cadence Industry Insights Blog 25 Feb 2013
Master & Commander: DVCon's Stan Krolikoski Now in its 25th year, DVCon is coming up in a couple of weeks in Silicon Valley. In terms of process nodes, 25 years is about twelve generations. In terms of dog years, it's about four generations. In terms of the life of Stan Krolikoski, however, 25 years is only part of one career. It's also the amount of time Stan's been going to DVCon, even though it had a different name when he attended the first such conference back in 1988.	EDACafe 06 Feb 2013
A look back on 2012: Accellera Editor's note: While other respondents talked about standards, the response I got from Accellera was so complete that I want to publish it in its entirety. An important principle of Accellera Systems Initiative is to encourage availability and adoption of next-general EDA and IP standards. To that end, Accellera has realized several accomplishments this year in the areas of technical achievements and standards; industry events; educational videos; and awards.	EE Times 13 Dec 2012
Accellera Systems Initiative: team effort & SystemC Library 2.3 "This week, Accellera Systems Initiative is announcing a new version of its SystemC library, Version 2.3 to be exact. There hasn't been a new version since way back in 2005 with Version 2.1 (albeit 2.2, a bug-fix release, was published in 2006), so this is the culmination of a lot of hard work."	EDACafe 18 Jul 2012
Accellera Systems rolls new SystemC Library "Accellera Systems Initiative has released the version 2.3.0 of its SystemC open source proof-of-concept library. The offering comes free of charge to the global electronic design community, the organization noted. Compatible with the newly revised IEEE 1666 Standard SystemC Language Reference Manual, announced by the IEEE Standards Association in November last year, version 2.3.0 provides a number features including support for transaction-level modeling (TLM), a critical approach to enable high level and more efficient design of complex ICs and SoCs in a single library, Accellera Systems stated."	EDN Asia 18 Jul 2012

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