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Welcome Message from Shishpal Rawat, Accellera Systems Initiative Chair

Accellera Systems Initiative Chair talks about EDA & IP standards organization.

Who We Are

Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.

Accellera Systems Initiative: A New Synergy for Standards

Shishpal Rawat and Eric Lish sign merger documents to create Accellera Systems Initiative

OSCI chair Eric Lish and Accellera chair Shishpal Rawat sign merger documents to create Accellera Systems Initiative

System, software, and semiconductor design are converging to meet the increasing challenges to create complex integrated circuits and system on chips. This convergence has brought to the forefront the need for a single organization to facilitate the creation of system-level, semiconductor design, and verification standards. Leading industry standards associations Accellera and the Open SystemC Initiative (OSCI) merged in 2011 to form a single organization, Accellera Systems Initiative, to address the needs of the system and semiconductor designers who must find new and smarter ways to create and produce increasingly complex chips. The new organization will evolve to create more comprehensive standards that benefit the global electronic design community.

Merger FAQs >

Our Mission

Our mission is two-fold:

  • Provide design and verification standards required by systems, semiconductor, IP, and design tool companies to enhance a front-end design automation process.
  • Collaborate with our community of companies, individuals, and organizations to deliver standards that lower the cost of designing commercial IC and EDA products and embedded system solutions, as well as increase the productivity of designers worldwide.

The purposes of the organization include:

  • Encourage availability and adoption of next-generation EDA and IP standards that encompass system-level, RT-level, and gate-level design flows.
  • Collaborate with the electronic design community to deliver standards that increase designer productivity and lower the cost of product development.
  • Provide mechanisms that enable the continued growth of the Accellera Systems Initiative user community including SystemC, Universal Verification Methodology (UVM), and IP-XACT.
  • Standardize technical implementations developed by Accellera Systems Initiative through the IEEE.

View our overview presentation >

A Rich History of Standards

Before joining together in 2011, Accellera and OSCI created complimentary standards and achieved technical milestones to advance the design and development of silicon chips and their end products.

Accellera Standards Success

Accellera Standards Success


OSCI Standards Success

OSCI Standards Success


Mainstream design flows include tools and intellectual property that are based on both OSCI- and Accellera-developed standards. As a combined organization, Accellera Systems Initiative is well equipped to accelerate existing standards efforts and foster new ones. With the recent addition of transaction-level modeling to the IEEE-1666 SystemC Standard, the design community has expressed interest in exploring technical synergy with the Universal Verification Methodology (UVM) and other languages, as well as more transparent flow from SystemC to SystemVerilog.

Synergies and Future Opportunities

Synergies and Future Opportunities