Events

Upcoming and recent events are listed below.

Event Sponsorship

Interested in becoming a Global Sponsor for 2015? Information about our Sponsorship Package can be found here. To sign up or get more information, please contact us.

Upcoming Events

DVCon IndiaDVCon India 2015

September 10-11, 2015
Bangalore, India
dvcon-india.org

DVCon India provides an excellent platform to share knowledge, experience and best practices covering Electronic System Level Design & Verification for IP and SOC, VIP development and Virtual Prototyping for Embedded Software development and debug. The conference provides multiple opportunities to interact with industry experts delivering keynote speeches, invited talks, tutorials, panel discussions, technical paper presentations, poster sessions and exhibits from ecosystem partners. The conference has two parallel tracks:

  • ESL Track: SystemC related topics such as Pre-Si SW development and debug using virtual prototypes of electronic systems and SoCs, architectural exploration, power and performance analysis for use cases, high level synthesis, model interoperable standards and more.
  • DV Track: Design & Verification languages, methodologies based on SystemVerilog, Verilog, UVM and technologies such as Formal Verification, Hardware Acceleration, Emulation and prototyping, along with the most widely used simulation and more.

Registration now open >
View program-at-a-glance >

DVCon Europe 2015DVCon Europe

November 11-12, 2015
Munich, Germany
dvcon-europe.org

After its successful launch last year, the Design and Verification Conference & Exhibition Europe will be back in 2015! DVCon Europe is a technical conference focusing on electronic design and verification of electronic systems and integrated circuits. DVCon Europe brings chip architects, systems designers, software developers and IP integrators the latest methodologies, techniques, applications and demonstrations on the practical use of EDA and IP languages and standards used in electronic design.

Registration now open >
View program-at-a-glance >

DVCon United States 2016DVCon United States

February 29 - March 3, 2016
San Jose, CA
dvcon.org

DVCon attendees have the opportunity to take part in the many informal, but often intense, technical discussions that pop-up around the conference venue among 800+ design and verification engineers and engineering managers. This networking opportunity among peers is possibly the greatest benefit to DVCon attendees. DVCon attendees have access to the vendors of advanced design and verification tools, IP/VIP and services who exhibit at the conference.

Call for extended abstracts open >
Call for tutorials open >
Call for panels open >


2015 Global Sponsors

ARMCadenceIntelMentor GraphicsSynopsys

Become a sponsor. Sponsorship of events provides many benefits including awareness and targeted lead generation. If you would like information on sponsoring an event, please contact us.


Presentations from Past Events

Presentations from past events are available for download.