Subject: Attribute KEEP vs NO_DUPLICATE & "clock uncertainty".
From: VhdlCohen@aol.com
Date: Tue Oct 22 2002 - 07:31:27 PDT
The KEEP attribute in 7.1.1.1. (VHDL) and 6.1.4 (Verilog) won't do what I
want.
KEEP says that the object will not be replicated, and will be preverved.
What I want is
1. Ability to optimize unwanted registers (i.e., NOT the keep).
2. Ability to NOT replicate registers.
The replication of registers has caused a lot of failures in space
applications because of single event upset, and the fact that some regs, with
same function (i.e., replicated), may flip, while the replicated one don't.
Bottom line, the KEEP does not allow me to both OPTIMIZE (i.e., no keep as
defined in spec), but prevent duplication (i.e., keep as defined in spec).
Another ISSUE:
How can I define a required hold time, thus
forcing the tool to add buffers between stages of FFs
where Q(x) connects directly to Q(x+1)?
I understand that some tools specify "clock uncertainty". Do we want to
include such an attibute?
-- From Spec
7.1.1.1. KEEP
Attribute subtype: boolean
Attributed object: entity, component declaration, component instantiation,
signal, variable
The KEEP attribute shall indicate to the synthesis tool that the attributed
object shall be preserved, and not deleted or replicated.
----------------------------------------------------------------------------
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
<A HREF="http://www.vhdlcohen.com/">http://www.vhdlcohen.com/> vhdlcohen@aol.com
Author of following textbooks:
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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