Subject: RE: section 5.6 ROM // Question
From: Jayaram Bhasker (jbhasker@Cadence.COM)
Date: Thu Apr 25 2002 - 06:22:07 PDT
Ben:
Based on our discussion, the following note is being added to 5.6 for ROM:
"Note: In the absence of a rom_block or a logic_block attribute, a synthesis tool may opt to implement
either as random logic or as a ROM."
Similar comment is being added to 5.7 for RAM.
- bhasker
-----Original Message-----
From: VhdlCohen@aol.com [mailto:VhdlCohen@aol.com]
Sent: Friday, April 05, 2002 5:43 PM
To: vlog-synth@eda.org
Subject: section 5.6 ROM // Question
We stated "The rom_block attribute shall be used to identify the variable that models the ROM."
However, the attribute is not REALLY needed, and synthesis tools may pick a ROM/or logic without the the attribute.
Attribute helps in guiding the tool. Thus, I have an issue with the "attribute SHALL be used"
How about changing this to:
"The rom_block attribute may be used to identify the variable that models the ROM."
from
<5.6 Modeling Read-Only Memories (ROM)
An asynchronous ROM shall be modeled as combinational logic using one of the following styles:
a) One-dimensional array with data in case statement (see 5.6.1).
b) Two-dimensional array with data in initial statement (see 5.6.2).
c) Two-dimensional array with data in text .le (see 5.6.3).
The rom_block attribute shall be used to identify the variable that models the ROM. If the logic_block
attribute is used, then it shall imply that no ROM is to be inferred.>
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Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
http://www. <http://www.vhdlcohen.com/> vhdlcohen.com/ vhdlcohen@aol.com
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* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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