Subject: Re: recursive instantiations of modules
From: Shalom Bresticker (Shalom.Bresticker@motorola.com)
Date: Sun Mar 10 2002 - 07:32:47 PST
Where?
M Ciletti wrote:
> FYI - The formal syntax of Verilog precludes recursive instantiation of modules, regardless of what tools might do before they
> choke on attempted nonsense. Mike Ciletti
-- Shalom Bresticker Shalom.Bresticker@motorola.com Principal Staff Engineer Tel: +972 9 9522268 Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478
This archive was generated by hypermail 2b28 : Sun Mar 10 2002 - 07:39:09 PST