Subject: Re: (* synthesis, keep [=
In a message dated 1/31/02 9:05:43 AM Pacific Standard Time,
> "Standard for VerilogŪ RTL Synthesis need not be concerned with what the
Now, on the subject of KEEP. I agree with your statement repeated below. so
Ben
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: Thu Jan 31 2002 - 09:21:28 PST
From: VhdlCohen@aol.com
Date: Thu Jan 31 2002 - 09:12:58 PST
muzaffer@dspia.com writes:
> synthesis tool may or may not do."
> Isn't this a contradiction ? As an example, by defining "keep" we are
> telling the synthesis tool that "it may not remove this net/register" from
> the design.
>
Interesting discussion. What I meant was that our standard has limitations
on what or how a tool handles some of the directives, as long as the intent
is meant. For example, if we provide a directive to infer a ROM, and the
targeted device does not support a ROM primitive, or a ROM primitive of the
specified size, the tool may opt to implement the ROM using combinational
logic, or it may opt to provide a watrning. Should our standard specify what
the tool should do in such cases?
perhaps we need to clarify what the tool should do. Thanks for your input.
My take is no. In my opinion the main reason one uses "keep" is
predictability. For some reason or another, one wants that double inverter,
that extra/unused DFF etc. remain in the design and not have the synthesizer
change it in any way. So I think keep means "don't touch" and this includes
replication. If it turns out that a net/reg I am keeping needs to be
replicated, I'd rather do it by hand because I am paying special attention to
it to start with and I'd like to know exactly what the result will be.
thanks,
Muzaffer
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
<A HREF="http://www.vhdlcohen.com/">http://www.vhdlcohen.com/> vhdlcohen@aol.com
Author of following textbooks:
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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