Using initialization statements for defining initial setup of registers


Subject: Using initialization statements for defining initial setup of registers
From: VhdlCohen@aol.com
Date: Tue Jul 03 2001 - 13:38:37 PDT


An interesting topic (and responses) came up on comp.lang.Verilog newsgroup:
Question: Would it make sense - or are there arguments against - using the
Verilog 'initial' block (or VHDL signal initialization statements) to inform
a synthesizer what the power-up state of the registers and memory should be?

Arguments FOR (from Jonathan.Bromley@doulos.com):
1. Many FPGAs power up with defined states without the use of an external
reset signal. Xilinx has "config-up" reset. The config bit stream gives an
initial value to just about every FF on the device. And several CPLD
families have real physical power-on reset to a known value; and it's always
been essentially impossible to exploit that in VHDL or Verilog designs, which
is sad because it's potentially a useful feature. The "initialise in an
initial block" (Verilog) or "initialised signals" (VHDL) approach would open
this window wide.

2. If there is a solid reset mechanism associated with power-up, and if that
can be coded so that simulation and synthesis give the same results, then you
have met the key requirements that normally force us into using explicit
resets. And in any case there is no reason why power-up and explicit reset
(possibly to different values!) shouldn't coexist in the same design.

Arguments Against:
1. Currently initialization is only defined with explicit resets. Would
synthesis vendors really want to change their tools?
2. Not all targets allow for configurations of registers. Synthesis tools
would have a hard time synthesizing code for targets that do not provide
those configuration features.
3. Portability issues.

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Ben Cohen     Publisher, Trainer, Consultant    (310) 721-4830
http://www.vhdlcohen.com/                 vhdlcohen@aol.com  
Author of following textbooks:
* Component Design by Example ... a Step-by-Step Process Using
  VHDL with UART as Vehicle",  2001 isbn  0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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