module foo(in, out);
input in;
output out;
assign out = bar(in);
function bar;
input barin;
if (barin)
bar = 1;
endfunction
endmodule
what happens when in changes 0->1->0 ? I get 1'bx->1'b1->1'b1 so function
bar remembers the last value when bar is not assigned. I have been told that
other simulators do the same but this requires a latch, doesn't it ? I have
seen this problem with an 1'bX input which propogated to the output with DC
but not with simulation. I think the best way to solve this is to require
that the function internal register should get initialized to unknown for
every invocation. 1364 doesn't say how functions are supposed to behave.
thanks