[vlog-synth] FW: IEEE Std 1076.6-2004 and IEEE Std 1364.1-2002

FYI.

regards,
- bhasker
WG Chair, 1076.6 and 1364.1
 

-----Original Message-----
From: j.haasz@ieee.org [mailto:j.haasz@ieee.org] 
Sent: Wednesday, April 06, 2005 10:36 AM
To: peter@ashenden.com.au; Jayaram Bhasker
Cc: t.decourcelle@ieee.org; a.ickowicz@ieee.org
Subject: IEEE Std 1076.6-2004 and IEEE Std 1364.1-2002

Dear Both:

It is my pleasure to inform you that the following standards have been
approved as IEC/IEEE dual logo documents:
 

 IEC 62142 Ed.1: Standard for Verilog Register Transfer Level Synthesis
(IEEE Std 1364.1)                           
 



 

 IEC 62050 Ed.1: Standard for VHDL Register Transfer Level (RTL)
Synthesis (IEEE Std 1076.6)                        
 

 Best regards,

 




Jodi Haasz
Program Manager
International Stds Programs and Governance
Standards Activities
Phone +1 732 562 6367
FAX +1 732 875 0695
Email: j.haasz@ieee.org