[vlog-synth] Dersigning FSM

Hi,

I have a general question. In designing a Finite State Machine which has
a large number of states (~60), is it better to have one module with all
the states or split the FSM into several small modules. All the FSM's
will interact with each other using some synchronizing signals. Does
this decision depend on whether the RTL is being written for FPGA or
ASIC.

Thanks

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Shiladitya Biswas
Received on Thu May 27 07:03:21 2004