Subject: Re: Section 7.7.9.1 - Initial Blocks - Illegal??
From: Paul Graham (pgraham@Cadence.COM)
Date: Wed Apr 10 2002 - 16:13:59 PDT
> Reviewing draft D2.1, I came across the statement in section 7.7.9.1 that
> "The initial statement shall be supported only for ROM modeling as
> described in 5.6.2. It shall be ignored in all other contexts."
>
> I thought we made initial block illegal except for ROM usage. Ignored
> initial blocks are exceptionally dangerous since this can cause a mismatch
> between pre-synthesis and post-synthesis simulations.
Initial blocks are not the only things that can cause simulation diffs.
Delays are another. Do you recommend erroring out for delays?
If you error out for initial blocks, then the customer ends up doing:
// ambit synthesis off
initial ..
// ambit synthesis on
(supply your favorite vendor's pragmas here)
and you still get simulation diffs.
By this logic we should error out when we see "synthesis on/off" pragmas,
since they can lead to simulation diffs as well, depending on where they are
placed!
paul
This archive was generated by hypermail 2b28 : Wed Apr 10 2002 - 16:16:07 PDT