Subject: Blackbox attribute
From: VhdlCohen@aol.com
Date: Wed Jan 16 2002 - 11:34:16 PST
I tried to send a PDF file to vlog-synth, but it never made it. Thus, I am
providing a link to the file instead.
http://members.aol.com/vhdlcohen3/blackbox.pdf
The first page of the document is shown below in text:
Summary
The following is an example of a black-box application using Verilog’95. The
black-box
model was an adder LPM, generated with Altera’s MegaWizard plug-in manager.
The
generated LPM was then modified per Synplicity’s guidelines to convert the
model into a
black-box. The black-box adder was then instantiated into another level of
hierarchy,
with one of the data input inverted. The model was then compiled with
Synplicity Pro,
which produced an EDIF file. That file was then used in Altera MAX+plus II
timing and
layout tool, reading the EDIF top level file as its design. This document
includes all the
Verilog code, Synplify’s RTL view, EDIF code, and Altera MAX+plus II results
view.
The generated EDIF file and LPM from Altera is shown at the end of the
document, as a reference.
Note that the LPM model does NOT use a black-box.
Verilog code for black-box Model
// in file add2.v
module add2 (
dataa,
datab,
cin,
result,
cout,
overflow)
/* synthesis syn_black_box
lpm_width = 8
lpm_direction = "ADD"
one_input_is_constant = "NO"
lpm_hint = "SPEED"
lpm_type = "LPM_ADD_SUB"
*/ ;
input [7:0] dataa;
input [7:0] datab;
input cin;
output [7:0] result;
output cout;
output overflow;
endmodule
----------------------------------------------------------------------------
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
<A HREF="http://www.vhdlcohen.com/">http://www.vhdlcohen.com/> vhdlcohen@aol.com
Author of following textbooks:
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
------------------------------------------------------------------------------
This archive was generated by hypermail 2b28 : Wed Jan 16 2002 - 12:14:28 PST