Subject: Cadence (Ambit) pragmas
From: Paul Graham (pgraham@Cadence.COM)
Date: Fri Dec 07 2001 - 09:08:12 PST
I earlier sent this e-mail to btf, but Bhasker informed me that vlog-synth
is a better place.
Here's Cadence's list of synthesis pragmas. All our synthesis pragmas begin
with "ambit synthesis", so I'll leave off that prefix:
// your favorite, Cliff
case = full,mux,parallel
// specify an architecture: cla, ripple, etc.
architecture = "cla"
// sets boundary on operator merging
merge_boundary
// specify set/reset control for registers inferred from named blocks
set_reset [a]synchronous blocks = "a,b,c"
// specify signals to connect to [a]synchronous set/reset pins
set_reset [a]synchronous signals = "s1,s2,s3"
// specify signals in block "a" only to connect to [a]synchronous
// set/reset pins
// This one may be hard to massage into a Verilog-2001 attribute
set_reset [a]synchronous block(a) = "s1,s2,s3"
Paul
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