Subject: RE: Minor corrections to IEEE P1364.1 / D1.7
From: J. Bhasker (jbhasker@Cadence.COM)
Date: Fri Nov 02 2001 - 06:07:26 PST
Joe:
Draft D1.7 is available on our web site: http://www.eda.org/vlog-synth .
- bhasker
--J. Bhasker Cadence Design Systems 7535 Windsor Drive, Suite A200, Allentown, PA 18195 (610) 398-6312, (610) 530-7985(fax), jbhasker@cadence.com
-----Original Message----- From: owner-vlog-synth@eda.org [mailto:owner-vlog-synth@eda.org]On Behalf Of Joseph P. Wetstein Sent: Thursday, November 01, 2001 2:18 PM To: VhdlCohen@aol.com Cc: vlog-synth@eda.org Subject: Re: Minor corrections to IEEE P1364.1 / D1.7
Any chance on seeing this document before tomorrow?
> 2 suggested corrections: > > 1.1 Scope > This standard defines a set of modeling rules for writing Verilog HDL > descriptions for synthesis. Adherence to these rules guarantees the > interoperability of Verilog HDL descriptions between register-transfer level > synthesis tools that comply to this standard. > > > > Section 6 > Pragmas > A pragma is a generic term used to define a construct with no predefined > language semantics that influences how a synthesis tool shall should > synthesize Verilog HDL code into a circuit. > A synthesis tool may ignore the pragma if the constraints defined by the > pragma cannot be met because of technology limitations (e.g., no ROM > primitive), or speed or area constraints. Pragmas are guidelines. > > -------------------------------------------------------------------------- -- > Ben Cohen Publisher, Trainer, Consultant (310) 721-4830 > <A HREF="http://www.vhdlcohen.com/">http://www.vhdlcohen.com/> vhdlcohen@aol.com > Author of following textbooks: > * Component Design by Example ", 2001 isbn 0-9705394-0-1 > * VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1 > * VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115 > -------------------------------------------------------------------------- ---- >
-- Joseph P. Wetstein, P.E. j.wetstein@ieee.org (707) 202-0600 fax PP/ASEL & KA3VJY [Tech+]
This archive was generated by hypermail 2b28 : Fri Nov 02 2001 - 06:13:39 PST