Subject: Re: Verilog: ROMRAM Revision 2
From: VhdlCohen@aol.com
Date: Thu Oct 11 2001 - 13:25:33 PDT
1. Added the constant defintion. See attached file
2. Changed the pragma names to XXX_Block
3. Put the ROM definition with 2-D array and $readmemX in initial statements.
4. Did not add pragmas per Cliff's recommendation because we need discussion
on that issue.
5. Would be NICE to be able to define a ROM in functions and tasks (like
sin_of_x function, where the body of the function includes a local ROM
definition, and a lookup). Need discussion on that issue.
I suggest that you add this document to our current spec as a strawman.
Ben
I> 1. I suggest that we change the pragma names to the following: rom_block,
> ram_block, logic_block (with no synstyle).
>
> For example:
>
> (* rom_block *) reg [3:0] romA [7:0];
>
> 2. Re your section1, we already support constant register assignments in
> always blocks. The only issue we were
> 1.discussing is supporting constant register assignments in an initial
> block. Your examples bring up an important point
> that " a const reg assignment is one in which the constant (rhs) value can
> be computed statically". Allows people to write
> all sorts of stmts including for loops in an initial statement as long as
> statically they turn out to be const reg assignment.
>
> 3. I think Cliff was suggesting that if we do support const reg
> assignments/readmem in an initial statement, then the
> initial statement SHOULD be decorated by a pragma telling the synthesis
> tool that this form of initial statement is legal
> for synthesis. An initial statement with no such attribute should be an
> error as far as synthesis is concerned.
>
> I am not sure if such a pragma (Cliff referred to it as
> "power_up_initialization") is really required.
> By putting the pragma, it does make the the implementation easier, but it
> causes extra typing for the user, which in my
> opinion is really not necessary.
>
> - bhasker
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Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
<A HREF="http://www.vhdlcohen.com/">http://www.vhdlcohen.com/> vhdlcohen@aol.com
Author of following textbooks:
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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