Subject: RE: Verilog: ROMRAM Revision 2
From: J. Bhasker (jbhasker@Cadence.COM)
Date: Thu Oct 11 2001 - 11:48:55 PDT
Ben:
Couple of comments:
1. I suggest that we change the pragma names to the following: rom_block,
ram_block, logic_block (with no synstyle).
For example:
(* rom_block *) reg [3:0] romA [7:0];
2. Re your section1, we already support constant register assignments in
always blocks. The only issue we were
discussing is supporting constant register assignments in an initial block.
Your examples bring up an important point
that " a const reg assignment is one in which the constant (rhs) value can
be computed statically". Allows people to write
all sorts of stmts including for loops in an initial statement as long as
statically they turn out to be const reg assignment.
3. I think Cliff was suggesting that if we do support const reg
assignments/readmem in an initial statement, then the
initial statement SHOULD be decorated by a pragma telling the synthesis tool
that this form of initial statement is legal
for synthesis. An initial statement with no such attribute should be an
error as far as synthesis is concerned.
I am not sure if such a pragma (Cliff referred to it as
"power_up_initialization") is really required.
By putting the pragma, it does make the the implementation easier, but it
causes extra typing for the user, which in my
opinion is really not necessary.
- bhasker
--J. Bhasker Cadence Design Systems 7535 Windsor Drive, Suite A200, Allentown, PA 18195 (610) 398-6312, (610) 530-7985(fax), jbhasker@cadence.com
-----Original Message----- From: owner-vlog-synth@eda.org [mailto:owner-vlog-synth@eda.org]On Behalf Of VhdlCohen@aol.com Sent: Saturday, October 06, 2001 1:15 PM To: vlog-synth@eda.org Subject: Re: Verilog: ROMRAM Revision 2
You'll notice that I added the satement: "Constant register assignments shall be allowedin procedural blocks (e.g, always, initial) and variable declarationswithin tasks and functions". This is because I see no reason why ROMs could not be inferred in functions or in always blocks, not just initial blocks. For example, I could write a sin_of_x function where within the function, I could define a ROM or a set of constants. I could also have regs initialized at declaration within those procedural blocks. I am not sure how to handle the $readmemb or $readmemh. I required that it has to be within an INITIAL block. But I am having second thought on that. For exmaple, it would be nice if the $readmemXX be supported in functions (e.g., function log_of_x). But having the declaration with an always block sensitive to a clock is awkward. Opinions? Ben
-------------------------------------------------------------------------- -- Ben Cohen Publisher, Trainer, Consultant (310) 721-4830 http://www.vhdlcohen.com/ vhdlcohen@aol.com Author of following textbooks: * Component Design by Example ", 2001 isbn 0-9705394-0-1 * VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1 * VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115 -------------------------------------------------------------------------- ----
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