Subject: Inferring FPGA Hardware Features?
From: Ken Coffman (kcoffman@sos.net)
Date: Sat Jul 14 2001 - 08:47:52 PDT
One of the topics we touched on a few years ago was allowing pragmas to
make use of explicit FPGA features. One of the things that drives me nuts
is to know there is a hardware feature available that I can't explicitly
make use of. The best example is clock enable, I'd love to be able to
assign a signal to a flip flop clock enable input. For example: (* signal1
attribute clock_enable*). This group seems more open to allowing closer
ties to the underlying hardware, do you folks feel like revisiting this
topic? Other features include reset/preset/global clock/sector clock, etc.
I don't think the spec needs to define all potential features, but should
allow this mechanism and tie down a few common ones.
This archive was generated by hypermail 2b28 : Sat Jul 14 2001 - 09:49:04 PDT