Re: Std P1364-Y2K :3.10 Arrays // Examples correct???


Subject: Re: Std P1364-Y2K :3.10 Arrays // Examples correct???
From: VhdlCohen@aol.com
Date: Thu Oct 26 2000 - 18:17:11 PDT


<<VhdlCohen@aol.com writes:
> 3.10 Arrays provides an explanation for an example that seems ambiguous.
> "wire [0:7] y[5:0]; seven-bit-wide vector wire indexed from 0 to 7"
> Isn't that a matrix EIGHT-bit wide with a depth of 64 words?
>
> Ben Cohen
> http://www.vhdlcohen.com
> >>

Michael McNamara : No; it is a matrix of eight-bit-wide vector wires indexed
from 0 to 5.

> I can now see it. 0:7 is an 8 bit vector, whereas 5:0 is an integer range.

However the spec is still wrong. It currently states:
> "wire [0:7] y[5:0]; seven-bit-wide vector wire indexed from 0 to 7"

and should be changed to:
"wire [0:7] y[5:0]; eight-bit-wide vector wire indexed from 0 to 5"
or probably better yet:
"wire [0:7] y[5:0]; eight-bit-wide vector wire indexed from 5 down to 0"

Ben Cohen
> http://www.vhdlcohen.com

------------------------------------------------------
VhdlCohen Training, Consulting, Verification
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Author of following textbooks:
VHDL Coding Styles and Methodologies, 2nd Edition,
  isbn 0-7923-8474-1 Kluwer Academic Publishers, 1999
VHDL Answers to Frequently Asked Questions, 2nd Edition,
  isbn 0-7923-8115-7 Kluwer Academic Publishers, 1998
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