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DVCon Goes to Europe

October 14-15, 2014 in Munich, Germany

The Design and Verification Conference & Exhibition Europe (DVCon Europe) is a new conference for the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, systems designers, software developers and IP integrators the latest methodologies, techniques, applications and demonstrations on the practical use of EDA and IP languages and standards used in electronic design. The focus of this highly technical conference is on the practical usage of specialized design and verification languages such as SystemC, SystemVerilog and e; assertions in SVA or PSL; the use of AMS languages; design automation using IP-XACT; and the use of general purpose languages C and C++. Low power techniques are pervasive and can be addressed in multiple areas.

Visit www.dvcon-europe.org to view the Call for Abstracts and find out how to become an exhibitor.

 

 

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Social Media, Standards & You

-- By Karen Bartleson and Sydney Burns

 

A critical part of maintaining a well-rounded education includes employing self-education techniques. Though there is an array of content circulating the web concerning engineering and standards, below you will find some hidden gems to add to your collection of self-education materials. By being involved in the current conversations on these sites, you can become an active member of the community. Read more >

 

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New DVCon 2013 Tutorials

 


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Download the latest Accellera Systems Initiative standards:

 

IP-XACT Vendor Extensions

OCP 3.0

OVL 2.7

SCE-MI 2.1

Soft IP Tagging 1.0

SystemC 2.3 (Includes TLM)

SystemC AMS 2.0

UCIS 1.0

UVM 1.1

Verilog-AMS 2.3.1

 

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