Subject: [vlog-synth] Verilog 2005
From: Jayaram Bhasker (JBhasker@esilicon.com)
Date: Tue Jan 13 2004 - 08:10:10 PST
Dear Verilog Synthesis WG member:
The 1364 Verilog WG is hard at work in defining the next rev of the Verilog language. The synthesis WG should
take this opportunity and work in conjunction with the 1364 group to develop the next rev of 1364.1. At least,
I would like to see the next rev of both the standards get balloted at the same time.
In this regard, I plan to forward proposals under discussion in 1364 to this WG (1364.1) for your review
from a "synthesizability" perspective. Forward any "synthesis" comments to this reflector ( vlog-synth@eda.org).
If you have feedback on any language aspect, you can forward your comments to etf@boyd.com.
- bhasker
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J. Bhasker
Chair, Verilog Synthesis Interoperability Working Group
http://www.eda.org/vlog-synth
jbhasker@esilicon.com, 610.439.6831, 610.770.9634(fax)
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