Re: Verilog RTL Synthesis standard: complimentary copy

Subject: Re: Verilog RTL Synthesis standard: complimentary copy
From: Vinaya Singh (vinaya@cadence.com)
Date: Wed Dec 18 2002 - 20:11:27 PST

• Next message: Jayaram Bhasker: "FW: SLR Invitation to ballot on P260.1-SCC14 (fwd)"
• Previous message: Vinaya Singh: "Re: Verilog RTL Synthesis standard: complimentary copy"
• In reply to: Vinaya Singh: "Re: Verilog RTL Synthesis standard: complimentary copy"
• Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

I am very Sorry for my previous mail on reflector.. honest mistake..

Thanks,
-VInaya

Vinaya Singh wrote:
>
> Bhasker,
> I joined late on this reflector. If I do qualify for this.
> I would like to have a hard copy as preference.
> PDF version also, would not hurt, if above is not possible.
>
> Choice: hard copy.
>
> Mailing address:
>
> Vinaya Kumar Singh
> Cadence Design Systems,
> 57A&B, Noida Export Processing Zone.
> G. B. Nagar (UP) 201305
> INDIA
>
>
> Thanks,
> -Vinaya

• Next message: Jayaram Bhasker: "FW: SLR Invitation to ballot on P260.1-SCC14 (fwd)"
• Previous message: Vinaya Singh: "Re: Verilog RTL Synthesis standard: complimentary copy"
• In reply to: Vinaya Singh: "Re: Verilog RTL Synthesis standard: complimentary copy"
• Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

This archive was generated by hypermail 2b28 : Wed Dec 18 2002 - 20:19:20 PST