Subject: Keep Attribute // An update
From: VhdlCohen@aol.com
Date: Wed Mar 06 2002 - 09:27:17 PST
e) (* synthesis, keep [ =<optional_value> ] *)
This attribute shall apply to a net, reg or a module instance or to a module.
With the presence of this attribute on an instance or module, the instance
or module shall be preserved, and not deleted nor replicated, even if the
outputs of the module are not connected. The internals of the instance or
the module shall not be subject to optimization. Similarly a net with such
an attribute shall be preserved.
The implied structure of a keep-attributed register shall be maintained, and
no optimization or structural changes to the register shall be performed. If
a register that has a keep attribute and an fsm_state attribute, the
fsm_state attribute shall be ignored.
In addition, any unused bit of a keep-attributed register shall be maintained
in the synthesized output. However, combinational logic that follows a keep
attributed register may be optimized.
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Author of following textbooks:
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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