Subject: Re: (* synthesis, keep [=
Ben,
Having a universal "keep" is a neat idea. But what about replication ??
Thanks,
- Krishna.
VhdlCohen@aol.com wrote:
> There are several objects that a user may wish to "keep" during
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: Wed Jan 30 2002 - 16:59:58 PST
From: Krishna Garlapati (krishna@synplicity.com)
Date: Wed Jan 30 2002 - 16:48:15 PST
Does "keep" on an object means that it cannot be replicated as well ??
> synthesis.
> 1. Wire: This assures that (1) a wire will be kept during synthesis
> and (2)
> that no optimizations will cross the wire. This is for nets and
> combinational logic. Example:
> wire [7:0] out_a (* synthesis, keep *);
>
> 2. sequential element: This assures that no optimizations cross a
> sequential element. It
> is usually used break unwanted optimizations which go through sequential
> elements. Example:
> reg [7:0] b (* synthesis, keep *);
>
> 3. instantiated instances: This is used to assure that instantiated
> instances are not optimized away. This will prevent the optimizations
> from removing an unconnected instance.
> my_design my_design1 (out1, in1, clk_in)(* synthesis, keep= 1*); // keep
> my_design my_design2 (out, in, clk_in)(* synthesis, keep= 0*); // may
> optimize out
>
> After thinking about it, I think that we could just restrain this
> attribute to just one.
> SOme vendors provide different attribute names for each class of object.
> We'll discuss this at out meeting, but comments are always welcomed.
> ----------------------------------------------------------------------------
> Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
> http://www.vhdlcohen.com/ <http://www.vhdlcohen.com/>
> vhdlcohen@aol.com
> Author of following textbooks:
> * Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
> 0-9705394-2-8
> * Component Design by Example ", 2001 isbn 0-9705394-0-1
> * VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn
> 0-7923-8474-1
> * VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn
> 0-7923-8115
> ------------------------------------------------------------------------------