signed types & case statement expressions.


Subject: signed types & case statement expressions.
From: Krishna Garlapati (krishna@synplicity.com)
Date: Tue Oct 09 2001 - 15:41:06 PDT


Hello everybody,

  I ran into this issue using "signed" expression branches
in case statement. The issue might be more general than
applicable only to case statments. Here is an example :

module top(in, out);
input [1:0] in;
output out;
reg out;

always @(in)
begin
    case(in)
    2: out = 'b0;
    default : out = 'b1;
    endcase
end

endmodule

My question is should "in", be sign extended or 0 extended.
I felt sign extension would be logical given the fact that
"in" is a signed type, but the simulator's I tested this on
seem to be doing a 0 extension.

Am I missing something or is this a bug in the simulators.
How should this be handled ?? Thanks for any clarification.
   

- Krishna.
Synplicity Inc.
(408)215-6152



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