HDLCon 2002 Call for Papers


Subject: HDLCon 2002 Call for Papers
From: Jayaram Bhasker (jbhasker@cadence.com)
Date: Thu Jul 19 2001 - 08:41:24 PDT


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                    HDLCon 2002 CALL FOR PAPERS!
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                11th International HDL Conference on
                   Hardware Description Languages

                  March 11 through March 12, 2002
              DoubleTree Hotel, San Jose, California, USA
                            www.hdlcon.org

Are you using Verilog, VHDL, Superlog, SystemC, Specman, Vera,...?

If you are modeling or verifying hardware, we want to hear about
your experiences!

October 1, 2001: Paper, tutorial and panel proposals due
October 30, 2001: Acceptance notification
December 10, 2001: Complete review draft of papers due
January 15, 2002: Final papers due
February 13, 2002: Final tutorial handouts due

HDLCon is the premier conference to present and exchange
ideas on the usage of Hardware Description Languages
(HDLs) for the design and verification of electronic circuits. Any
language used to model and verify electronic hardware
is of interest at this conference, including VHDL, Verilog, SuperLog,
Vera and Specman E, as well as general purpose languages such as C++.
Conference attendees are designers of ASICs, FPGAs, custom ICs and
electronic Systems, as well as those involved in the research,
development and application of Electronic Design Automation (EDA) tools.

Papers and tutorials are from design engineers for the benefit of other
design engineers. They are technical in nature,
and reflect real life experiences in using HDLs.

CALL FOR PAPERS, TUTORIALS AND PANELS
-------------------------------------
HDLCon 2002 continues the tradition of having very
technical and useful papers, tutorials and panels!
We encourage you to contribute your experiences in
HDL-based design, and to participate in the valuable
exchange of ideas and design techniques.

The conference will include the following types
of presentations:
* Technical papers (30 minutes in length)
* Technical tutorials (3 hours in length)
* Panel discussions (60 minutes in length)

In addition to recognition before your fellow engineers
and the fame and glory of being published in the
proceedings of a highly technical conference,
you will receive:

* Complimentary registration for the conference,
 including all sessions and tutorials
* A recognition award, presented at the conference
* A $750 award for best paper or tutorial
(if your material is judged to be the best,
 of course; best papers and tutorials will
  be judged by the conference attendees).

PROPOSAL SUBMISSION REQUIREMENTS
--------------------------------
Proposals for papers, tutorials or panels should be at
most two pages in length, and must contain:
* The title
* The type of presentation (paper, tutorial or panel)
* The names of the paper authors, with company affiliations
       and job titles
* The name of the presenter or panel moderator,
       with company affiliation and job title
* For panels, the proposed panel members and their
       qualifications
* The presenter’s/moderator’s e-mail address,
       phone number, fax number, and mailing address
* A short abstract of the paper, tutorial or panel content
(please do not submit a full paper, and call it an abstract!)
* A brief biography of the presenter or panel moderator

PAPERS AND TUTORIALS MUST BE TECHNICAL IN NATURE AND
REFLECT REAL LIFE EXPERIENCE IN MODELING AND
VERIFYING HARDWARE!

Proposals should be submitted as a PDF file, a Microsoft
Word file or a FrameMaker file. PDF is the preferred format. Please
e-mail your proposal to the HDLCon 2002 program chair
at stuart@sutherland-hdl.com. Electronic submission via
e-mail is the only accepted method.

FINAL PUBLICATION REQUIREMENTS
------------------------------
If your proposed paper, panel or tutorial is accepted,
an author kit with details on paper and presentation
formatting will be sent to you. Final papers should be
between 4 and 8 pages, single spaced. Final tutorial
materials should include a copy of all presentation slides.

TOPIC SUGGESTIONS
-----------------
Any paper, tutorial or panel related to modeling and/or
verifying hardware will be considered. Please be creative
with your paper title and content! The title should grab attention, and
the paper should captivate the audience and provide practical
information for engineers. Here are some suggestions for topics that
conference attendees might find useful:
* Experiences with getting designs to market on time
* Experiences with designing at higher levels than RTL
* Experiences with System-on-Chip design
* Experiences with formal verification
* Using embedded processors with FPGAs or ASICs
* Experiences with converting FPGAs to ASICs, or vice-versa
* Synthesizing C++, SystemC or SuperLog
* Experiences with prototyping with FPGAs
* Making hardware/software co-design actually work
* Experiences with mixed-signal designs
* Working with test languages such as E and Vera
* Modeling tricks for best synthesis results for ASICs and FPGAs
  (will the same model work for both?)

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The HDLCon 2002 conference is sponsored by Accellera
(www.accellera.org). For more information concerning the
conference,please contact:

Publications Department Telephone: (303) 530-4562
c/o MP Associates, Inc. Fax: (303) 530-4334
5305 Spine Rd., Suite A E-mail: info@hdlcon.org
Boulder, CO 80301

URL:
www.hdlcon.org******************************************************************
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J. Bhasker
Cadence Design Systems
7535 Windsor Drive, Suite A200, Allentown, PA 18195
610.398.6312, 610.530.7985 (fax), jbhasker@cadence.com



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