IEEE Fees??

Clifford E. Cummings (cliffc@sunburst-design.com)
Mon, 10 May 1999 08:30:25 -0700

Dear VSG & Verilog Synthesis Interoperability WG:

I just received an invitation to ballot on the SDF standard. Included was
an important notice that states that "Effective June 1, 1998, you must be
an active member of the IEEE Standards Association (IEEE-SA) in order to
participate as a voter in any new ballots."

I find this to be offensive and was wondering if anyone else had a problem
with this requirement? I am an IEEE member (since the mid 1980's) and have
spent $1,000's of dollars (mostly travel and phone costs) and 100's of
hours over the past two years working on both the 1999 Verilog LRM and the
Verilog Synthesis Interoperability Specification. I believe in addition to
the IEEE-SA requirement, we have also been asked to join DASC for about
$50/year.

I suppose that $100 for IEEE-SA membership, $50 for IEEE-DASC membership
and $100 for IEEE membership are a small percentage of the cost of
participation to improve Verilog standards, but this feels like asking
blood donors to pay for the privilege of giving blood. I believe the IEEE
is placing too many taxes upon the working standards group members and
these fees certainly discourage the all-important user participation on
these committees.

Am I the only standards group participant that is offended by these fees?
Does anybody know of a formal mechanism to complain about these fees to the
IEEE?

Regards - Cliff Cummings

//********************************************************************//
// Cliff Cummings E-mail: cliffc@sunburst-design.com //
// Sunburst Design, Inc. Phone: 503-579-6362 / FAX: 503-579-7631 //
// 15870 SW Breccia Dr., Beaverton, OR 97007 //
// //
// Verilog & Synthesis Training //
// Verilog, VHDL, Synopsys, LMG, FPGA, Consulting and Contracting //
//********************************************************************//