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Technical Tutorials from DVCon Available

The complete set of technical tutorials from Accellera Day at DVCon 2014 is now available:

  • Using UPF for Low Power Design and Verification presents the latest information on the Unified Power Format (UPF). Beginning with a review of the concepts, terminology, commands, and options provided by UPF, it covers the full spectrum of UPF capabilities and methodology, from basic flows through advanced applications, with particular focus on incremental adoption of UPF.
  • In Case Studies in SystemC, hands-on users and tool developers share their recent experience and describe advanced methodologies that have helped them achieve significant benefits. Includes a few of the most useful features introduced with SystemC 2.3.0 and code examples.
  • OCP: The Journey Continues presents the past, present and future of the Open Core Protocol IP interface socket standard, which was transferred to Accellera in October, 2013. It includes a discussion about the future needs in IP core interfacing and where future version of the OCP standard may play a role.
  • Experience the Next ~Wave~ of Analog and Digital Signal Processing using SystemC AMS 2.0 is a highly technical tutorial that targets system engineers, integrators, architects and verification engineers active in industrial projects where analog and digital signal processing functionality comes together and where interoperability between mixed-signal and HW/SW subsystems becomes apparent.
  • UVM — What's Now and What's Next presents topics on sequence creation, register layer use (both beginner and advanced), TLM-based communication, test execution using run-time phases, and messaging enhancements.

In addition, The Future of Mixed Signal Verification: From Manual Simulations to Full Regression presents a panel discussion of emerging techniques that would enable the digital-centric mixed-signal community to reach their next level of verification. Moderated by Helene Thibieroz of Synopsys, the discussion includes panelists from Intel, Texas Instruments, Maxim Integrated, and Qualcomm.
 

UVM 1.2 is Here!

A new version of the class reference document UVM 1.2 for SoC verification is available. UVM 1.2 improves interoperability and reduces the cost of IP development and reuse for each new project. New features include enhanced messaging and improvements to the register layer. UVM 1.2 and its reference implementation are available for download. The implementation includes detailed release notes and script to help users upgrade, as some new features introduce backward incompatibility. UVM 1.2 is entering a review period ending October 1. Users are encouraged to participate using the UVM 1.2 Public Review Forum. UVM has an active user community. The LinkedIn group tops 5,300 members. A technical tutorial from the 2014 Design and Verification Conference is available. Taught by industry experts, the five-part tutorial includes an introduction to UVM 1.2 and in-depth user examples. Find out more about UVM 1.2 in our press release. Read more >

 

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December newsletter now available

 

• UVM 1.2 released. Download | Read the press release

 

• Yatin Trivedi receives 2014 Accellera Leadership Award

 

• Verilog-AMS 2.4 released. Download | Read the press release

 

• New SystemC Core and Verification Libraries

 

• Accellera acquires OCP 3.0.  Press release

 

New IP-XACT vendor extensions released.  Press release

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Other News From the Industry

Accellera & IEEE-SA: A Case Study for Open Collaboration Success

-- By Yatin Trivedi

 

At the end of last year, in a blog post titled Peace, Love and OpenStand, I talked about the first principle of OpenStand: respectful cooperation among standards organizations. In this post, I will provide a more specific example of the ongoing, successful collaboration between two specific standards organizations, which demonstrates the first Open Stand principle in action. This example comes from the industry I love the most – Electronic Design Automation (EDA). Read more >


Social Media, Standards & You

-- By Karen Bartleson and Sydney Burns

 

A critical part of maintaining a well-rounded education includes employing self-education techniques. Though there is an array of content circulating the web concerning engineering and standards, below you will find some hidden gems to add to your collection of self-education materials. By being involved in the current conversations on these sites, you can become an active member of the community. Read more >

 

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New DVCon 2014 Tutorials

 


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Download the latest Accellera Systems Initiative standards:

 

IP-XACT Vendor Extensions

OCP 3.0

OVL 2.8.1

SCE-MI 2.2

Soft IP Tagging 1.0

SystemC (Includes TLM)

SystemC AMS 2.0

UCIS 1.0

UVM 1.2

Verilog-AMS 2.4

 

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