Welcome to Accellera Systems Initiative
Welcome to the new website of Accellera Systems Initiative! We are an independent and collaborative organization with the mission to create and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry.
Formed by the merger of industry standards bodies Accellera and Open SystemC Initiative (OSCI), our technical committees work diligently to develop standards that address the real needs of system and semiconductor designers who must find new and smarter ways develop increasingly complex chips for today’s products.
We invite you to join us in our mission to take system-level standards to the next level of design. Check back with us often to find out the latest developments in EDA and IP standards. And sign up as a community participant to receive information on user events, technical videos, articles and other insightful information.

NASCUG 17
February 27, 2012, DVCon 2012
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Agenda now available >
ESCUG 25
Mar 13, 2012, DATE 2012
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ESCUG Workshop
"OSCI and Accellera Core Technologies for the Next Generation of System-Level Design"
Mar 16, 2012, DATE 2012
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Recent Happenings
• IEEE 1666-2011 Now Available for Free Download courtesy of Accellera Systems Initiative.
• Nominations being accepted for the Accellera Systems Initiative Technical Achievement Award now through January 27.
• SystemC 2.3 Library public review is now underway.
• Open Verification Library (OVL) 2.6 release is now available for download.
• UVM 1.1 is now available for download.
• The IEEE has approved a revised version of the IEEE 1666™ “Standard SystemC Language Reference Manual. Read the press release.
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News
Featured Quote"This timely consolidation of two interrelated consortia promises to deliver enhanced value to its members and the industry at large. Si2 is pleased with this transition, as it allows better-focused partnership opportunities in coordination of industry standards spanning the complementary scopes of our respective organizations. As former Accellera Vice-Chair and VHDL International President, I led the consolidation that created Accellera, and now anticipate similar benefits for emerging language-based standards." -- Steve Schulz, President and CEO, Si2... More » Other News From the Industry
IEEE APPROVES REVISED IEEE 1666™ "SYSTEMC LANGUAGE" STANDARD FOR ELECTRONIC SYSTEM-LEVEL DESIGN, ADDING SUPPORT FOR TRANSACTION-LEVEL MODELING
New version to enable higher level, more efficient design of complex integrated circuits and system-on-chips
PISCATAWAY, N.J., USA, 10 November 2011 – IEEE, the world's largest professional association advancing technology for humanity, today announced that the IEEE Standards Association (IEEE-SA) Standards Board has approved a revised version of the IEEE 1666™ "Standard SystemC Language Reference Manual," which specifies SystemC, the high-level design language used in the design and development of electronic systems. The new version of IEEE 1666 encompasses many enhancements, notably the support for transaction-level modeling (TLM), a critical approach to enable higher level and more efficient design of complex integrated circuits (ICs) and system-on-chips (SoCs). |
Featured Videos
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Latest Downloads
Download the latest Accellera Systems Initiative standards:
• OVL 2.6 • UVM 1.1
Download IEEE standards. |
Login / RegisterAccess to some downloads and areas within the site is restricted. We encourage you to register and log in. • Already Registered? Log in! • Register for Access as a: |
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