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See Accellera at DAC in Austin!

As we look to June, we have some exciting events planned during the Design Automation Conference. At our annual breakfast, we will host a town hall discussion about the emerging IEEE 1801-2013 standard. With so many of our projects needing power-aware structures, this is sure to be an exciting and informative discussion about the future of low-power design and verification. In addition, a tutorial will be held addressing "A Practical Guide to Packaging IP and Assembling SoCs Using the IP-XACT- IEEE1685 Standard." Two Birds-of-a-Feather meetings planned around the new Multi-Language Working Group and the new IP Protection / IEEE P1735 will bring together engineers to discuss requirements and recommendations for each. And the North American SystemC User Group will again meet to bring the latest SystemC advancements to users. There’s a lot going on! Find out more >

Check out the new UVM Community to find links to forums, contributions and ecosystem as well as the Verification Intellectual Property (VIP) technical activities page. New technical tutorials presented at DVCon 2013 are now available: Increasing Productivity with SystemC in Complex System Design and Verification and Lessons from the Trenches: Migrating Legacy Verification Environments to UVM.

DAC Events

Monday, June 3

Accellera Breakfast and Town Hall Meeting
NASCUG
IP-XACT Tutorial

Tuesday, June 4

Multi-Language Birds-of-a-Feather Meeting
IP Protection / P1735 Birds-of-a-Feather Meeting

Find out more >

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Recent Happenings

• May newsletter now available

• UVMWorld has moved

• IP-Tagging 1.0 Standard now available for download. >>> Press release

• New Multi-Language Working Group established. >>> Press release.

• SystemC AMS 2.0 LRM now available for download

• UVM 1.1d Reference Implementation now available

• IEEE 1800™ Standard now available for free download, courtesy of Accellera

• Janick Bergeron receives 2013 Technical Excellence Award

• SystemC 2.3.0 Library now available

News

Other News From the Industry

Revised IEEE 1800™ Standard Intended to Improve Efficiency of Electronic-System Design and Verification

Standard specifying SystemVerilog available for download at no charge through the IEEE GET Program

PISCATAWAY, N.J., USA, 25 February 2013 - IEEE, the world's largest professional organization advancing technology for humanity, today announced that the IEEE Standards Association (IEEE-SA) Standards Board has approved IEEE 1800™-2012 "SystemVerilog—Unified Hardware Design, Specification and Verification Language." The revised standard is intended to enhance and improve the efficiency of electronic-system design and verification. >>> Read more

IEEE Award Honors Stan Krolikoski as EDA Standards Pioneer

This week (Dec. 2, 2012) the IEEE recognized those efforts by awarding the annual Ron Waxman DASC (Design Automation Standards Committee) Meritorious Service Award to Krolikoski, who today is a distinguished engineer at Cadence.

>>> Read more