Calendar of Events

Improving Design Productivity and IP Quality through the Effective Use of Standards for Complex Multicore SoCs

Wednesday, November 4, 2009

1:00 PM- 2:00 PM
 
Panelists:
Dr. Gary Delp, Technical Director, The SPIRIT Consortium
Dr. Karen Pieper, Technical Committee Chair, Accellera
 
Since 2001, the SPIRIT Consortium has provided the focus establishing IP and tool integration standards. The goal has been to enable improved IP reuse through design flow automation. From these efforts came the IP-XACT Standard, currently making its way through IEEE P1685 and SystemRDL, now open available and actively used. Accellera has been the driving force behind widely adopted language-based standards such as VHDL (IEEE1076), System Verilog (IEEE 1800), and UPF (IEEE 1801).
 
What do these standards have to do with you? As SoC designers it is likely that you are using these standards daily, or are using them in evaluation and quality check processes of accepting various intellectual property (IP) blocks for their suitability to your SoC designs. If you are on the verification side, perhaps you are exploiting the interoperability between VMM and OVM, an activity led by Accellera, greatly improving the reuse capabilities of verification IPs (VIP).
 
The speaker(s) have been involved in creation and deployment of multiple successful IPs using standards. They will share their experience of the benefits and difficulties/pitfalls for the right way to use standards for IP creation and deployment.