Verilog-Analog Mixed Signal Technical Subcommittee

The charter of the Verilog-AMS Technical Subcommittee is to develop, update and promote analog and mixed signal extensions to the Verilog (IEEE-1364) language. Most recently, Accellera approved the Verilog-AMS LRM, version 2.3, in August 2008. This version supersedes the OVI Verilog-A LRM (from June 1996) and previous versions of the Verilog-AMS LRM.

Going forward, the next goal of the committee will be alignment of Verilog-AMS with the SystemVerilog work of the IEEE 1800, or inclusion of AMS capabilities in a new "SystemVerilog-AMS" standard. In addition, work will also be undertaken to focus on new features and enhancements requested by the community to improve mixed signal design and verification and also extending SystemVerilog Assertions to Analog and Mixed Signal designs through the subcommittees.

Verilog-AMS benefits users by allowing them to describe and simulate analog and mixed signal designs using a top-level design methodology as well as the traditional bottom up approaches. The Verilog-AMS standard supports analog and mixed signal designs at three levels: transistor/gate, transistor/gate-RTL/behavioral, and mixed transistor/gate-RTL/behavioral circuit levels. Moreover, Verilog-AMS provides powerful structural and behavioral modeling capabilities for systems in which the effects of, and interactions among, different disciplines like electrical, mechanical and thermal are important.

On this web page analog, mixed signal and system designers can find relevant information on the Verilog-AMS, from activities to technical data on how to better use these extensions.

• More about Verilog-AMS

These links will take you to the old AMS site at www.eda.org:

• Examples
• Design Objectives
• Mantis bug database (login as guest/guest and then select Verilog-AMS from the project list)
• Current discussion documents
• E-mail reflector archive
• Old table of open issues
• Compact modeling extensions subcommittee
• Download Previous LRM versions
  

Join the Verilog-AMS-TSC

If you would like to join the AMS-TSC and you are an employee of an Accellera member company, create your user account here.

If you are not yet a member of Accellera, please contact us with your request to participate as a non-member.