Hi, Shalom - Again, you are technically correct. The comment is technically not accurate except that VPI users who use vpiTri are probably using it as a tri-state driver. To me it is not a huge issue. That having been said, if you support allowing procedural assignments to wires in Verilog, I will vote with you on this one :-) Regards - Cliff At 04:12 AM 7/4/2007, Bresticker, Shalom wrote: >This is much worse than the example, because it is not an example. The >comment is explaining that vpiTri signifies a three-state net, which is >simply not correct. > >Shalom > > > > >4. Annex L: vpiTri has the comment /* three-state net */. This is > > >not accurate. tri is exactly the same as wire. It may or may not be > > >three-state. > > > > I would not change this for the same reasons as point #1 above. > > Again, you are technically correct, but I believe there is value in > > leaving this comment as is. ---------------------------------------------------- Cliff Cummings - Sunburst Design, Inc. 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005 Phone: 503-641-8446 / FAX: 503-641-8486 cliffc@sunburst-design.com / www.sunburst-design.com Expert Verilog, SystemVerilog, Synthesis and Verification Training -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Jul 4 17:16:23 2007
This archive was generated by hypermail 2.1.8 : Wed Jul 04 2007 - 17:16:33 PDT