RE: [sv-bc] minor wire issues

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Wed Jul 04 2007 - 23:37:36 PDT
Ah, but the user does not choose to use vpiTri. That is the value that
the VPI returns to him on a net declaration. And if the user assumes
automatically that it is a three-stated net (tri-state being a
registered trademark of National Semiconductor), then he is making a
mistake, because that assumption may not be correct.

(Your offer isn't a fair one. On the other hand, if you want to trade
off wire procedural assignments for defparams, I might consider it...)

Shalom


> Again, you are technically correct. The comment is technically not
> accurate except that VPI users who use vpiTri are probably using it
> as a tri-state driver. To me it is not a huge issue.
> 
> That having been said, if you support allowing procedural assignments
> to wires in Verilog, I will vote with you on this one :-)

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Received on Wed Jul 4 23:38:07 2007

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