RE: [sv-ec] Testbench examples ...#1step

Jonathan,

I agree that using #1step in anything other than a clocking block sample
is of dubious value, but that's a methodology issue. We used a special
timeunit to specify this special skew in order to allow the skew to be
passed in as a parameter. That ruled out using a new keyword. Using a
special value (0 or -1 were considered) was deemed as likely to cause
more confusion, especially since we were also trying to enable Observe
region sampling semantics (what is now #0 input skew) for which we did
end up using a special value.
	Arturo
 
-----Original Message-----
From: Jonathan Bromley [mailto:jonathan.bromley@doulos.com] 
Sent: Sunday, November 05, 2006 9:02 AM
To: Arturo Salz; stuart@sutherland-hdl.com; sv-ec@eda-stds.org
Subject: RE: [sv-ec] Testbench examples ...#1step

Arturo,

> The intent for 1step was definitely to make it behave as a 
> special case
> so that regardless of any local precision it would sample the value
> present in the postponed region of the previous time-slot, 

That was my original (albeit rather vague) understanding too.

If this is so, then surely it makes no sense whatever for
"step" to be a time unit.  It is also of very doubtful value
to do stuff like

  stmt1;
  #1step stmt2;

because, just as you find if you try to wait for the 
event "sys.any" in 'e', the delay thus achieved is
a hostage to fortune - its meaning can be affected
by parts of the simulation that are quite unrelated
to the code that concerns you.

As I have pointed out, all current tools seem to handle 
#1step in the special way you describe, so it makes good
sense to formalize that understanding in the LRM.
-- 
Jonathan Bromley, Consultant

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