Subject: [sv-ec] Alternate Class Proposal Version 1.1
From: Jay Lawrence (lawrence@cadence.com)
Date: Wed Mar 12 2003 - 04:48:31 PST
Once again my proposal extended beyond what is immediately necessary to
allow future extension of classes to being static and other data types
to being dynamic. In particular, I've received feedback that the
inclusion of references to references is causing confusion. Since it is
not necessary to have this to have the same semantics of classes today,
I've removed it from the proposal. The changed version (with change
bars) is attached.
Given that SystemVerilog allows functions to have 'output' parameters,
this may never be necessary. I'll have to give it more thought. It is
certainly not necessary to get the equivalent semantics of classes today
and allow for future extension.
Note that this proposal is still only talking about references which are
in all cases dynamically allocated explicitly and garbage collected. It
is NOT introducing arbitrary unsafe pointers.
Jay
===================================
Jay Lawrence
Architect - Functional Verification
Cadence Design Systems, Inc.
(978) 262-6294
lawrence@cadence.com
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