Subject: Re: Verilog-AMS - Issue 15: `include
From: Michael McNamara (mac@verisity.com)
Date: Tue Jul 09 2002 - 17:57:25 PDT
Paul Graham writes:
> > Further, 'include' is not a reserved word, so users could have:
>
> Actually, 'include' _is_ a reserved word. See Annex B of 1364-2001.
>
> But the point is well made that for a preprocessor you want an out-of-band
> symbol, one which cannot occur except as input to the preprocessor. Since
> '#' is already used in several places in the verilog syntax, it would be
> awkward to try to extend the preprocessor to recognize '#' as a preprocessor
> token in certain cases and not in others.
>
> Presumably if you were to allow '#include', then you would want to allow
> '#define', and '#macro', for a macro reference. I think that allowing
> '#macro' would completely break the syntax. And if you didn't have
> '#macro', then why make a special exception just for '#include'?
>
> Paul
It is very interesting that include is listed as a reserved word in
1364-2001, but define, timescale, ifdef and so on are not so listed.
include was not a reserved word in 1364-1995.
Anyone remember why include was added to the reserved words in 2001?
-mac
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