Subject: Re: Verilog-AMS - Issue 15: `include
From: Paul Graham (pgraham@cadence.com)
Date: Tue Jul 09 2002 - 13:39:35 PDT
> Further, 'include' is not a reserved word, so users could have:
Actually, 'include' _is_ a reserved word. See Annex B of 1364-2001.
But the point is well made that for a preprocessor you want an out-of-band
symbol, one which cannot occur except as input to the preprocessor. Since
'#' is already used in several places in the verilog syntax, it would be
awkward to try to extend the preprocessor to recognize '#' as a preprocessor
token in certain cases and not in others.
Presumably if you were to allow '#include', then you would want to allow
'#define', and '#macro', for a macro reference. I think that allowing
'#macro' would completely break the syntax. And if you didn't have
'#macro', then why make a special exception just for '#include'?
Paul
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