>From: "Mark Hartoog" <Mark.Hartoog@synopsys.com> >What value will this print? Are there Verilog simulators where this >will not print '5'? Yes. Unless the implicit continuous assignment process preempts the initial block process execution, the print will produce an x. In the absence of such preemption (which inlining would be the equivalent of) that would be the expected result. This potential delay for an implicit continuous assignment is one of the visible differences between these two viewpoints. Steven Sharp sharp@cadence.com -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Feb 27 14:29:23 2007
This archive was generated by hypermail 2.1.8 : Tue Feb 27 2007 - 14:29:34 PST