Date: Wed May 03 2006 - 11:15:36 PDT
In mathematical terms, a variable is an identifier that has no fixed numerical value. If we could use the Greek letter p to represent the irrational value 3.14159... that would be an example of an identifier with a fixed numerical value, a true constant (although irrational). In simulation terms, we usually mean an object whose value can change over time, but from the compiler's standpoint, a parameter may change its value during the course of elaboration. Dave ________________________________ From: owner-sv-bc@server.eda.org [mailto:owner-sv-bc@server.eda.org] On Behalf Of Bresticker, Shalom Sent: Monday, May 01, 2006 1:43 AM To: sv-bc@server.eda.org Subject: [sv-bc] 6.3: Constant variables? 6.3 says, "Constants are named data variables that never change. Verilog provides three constructs for defining elaboration-time constants: the parameter, localparam and specparam declarations." This looks a little strange. I understand that in 6.3.5, one might want to think of consts as a special type of variable, but it seems strange to say that a parameter is a variable, even if one that never changes. In what way is it a variable? Even its declaration differs from that of variables. Shalom Shalom Bresticker Intel Jerusalem LAD DA +972 2 589-6852 +972 54 721-1033 I don't represent Intel
