As Stu points out, it is a good idea to make clear that the proposal is
backward compatible with existing Verilog. We all know that was a goal
and the rules were designed to meet it. But someone who was just looking
at the resulting rules might have trouble reconstructing that.
Since it is a little late to put that into the overview, I guess we just
have to deal with it when it comes up.
Steven Sharp
sharp@cadence.com
Received on Fri Nov 12 10:47:32 2004
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