Hi Greg, The 'interconnect' keyword is new in SV12, for generic (typeless) nets and ports, and is used for discrete real modeling. In digital synthesis, we just treat it like 'wire'. For context, see attached. There are also user-defined resolution functions with the new 'nettype' keyword which is not yet supported in digital synthesis. -- Brad -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
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