RE: [sv-ec] Comments on 890-5.pdf

From: Jonathan Bromley <jonathan.bromley_at_.....>
Date: Mon Feb 12 2007 - 05:33:53 PST
A few comments on the 890-5 proposals relating to
program blocks (clause 16):


General comments
~~~~~~~~~~~~~~~~

(1) Design variables
It seems to me that there's some verbal struggling with
the notion of "design variables" or "design signals", with 
the phrase requiring glossing each time it's used.  Then,
for brevity, we have "design signals in a module" when 
strictly we should speak of a module or interface.
Would it be sensible to define the phrase "design signal"
or "design object" at the outset to be a net or variable
declared in a module or interface?

(2) Spelling of "Observed" region name throughout.


16.3 Eliminating testbench races
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

(1) Wrong font in the paragraph heading.

(2) First complete paragraph at the top of page 8 of 
890-5.pdf, third line, just after the new insertion:  
it's not clear to me why the use of input #0 is 
necessary or relevant here.  It might, however,
be useful to observe (in a Note) that a program reading 
design signals without using a clocking block will see 
the same values as it would if the signals were clocking
inputs with a skew of #0, unless the program then
modifies those signals itself in the same timeslot.


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Jonathan Bromley, Consultant

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Received on Mon Feb 12 05:34:18 2007

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