RE: [sv-ec] Update proposal for 1371 $exit

Comments below.

 

________________________________

From: Arturo Salz [mailto:Arturo.Salz@synopsys.com] 
Sent: Friday, January 26, 2007 4:38 PM
To: Rich, Dave; sv-ec@eda-stds.org
Subject: RE: [sv-ec] Update proposal for 1371 $exit

 

Dave,

 

You proposal again modified the intended semantics of $exit.

 

I think the phrase "disable all initial blocks" is not specific enough.
It seems to imply that *only* the processes that correspond to the
initial blocks are disabled, when the intent is to terminate all
processes spawned by those initial blocks, including all descendant
processes. Also, the term disable might imply that the processes may be
re-enabled when they are in fact terminated.

[DR>] This is the Verilog 1364 definition of disable and the definition
used for disable fork. All sub processes are terminated and execution
goes to the statement that follows the block. As with an explicit
disable of an initial block (i.e. its top-level named block), there is
no way to re-enable it.

 

Also, it's not clear what the following sentence means

"Calling $exit from a thread originating from outside an initial block
in a program ..."

I know what you're trying to say, but the use of outside is confusing -
to me that implies some sort of lexical containment. Perhaps,

            Calling $exit from a thread that does not originate in an
initial block in a program ..."

[DR>] That's fine with me.

 

Finally, how does this interact with Seven Sharp's proposal to consider
only a thread's existing scheduling region? Your proposal might be to be
at odds with that concept in the sense that the run-time would need to
maintain a thread's origin.

[DR>] You're going to have to maintain the thread's origin if you want
$exit to work if called from a thread created by fork/join_none. Or at
least the program block that originated the thread.

 

            Arturo

 

________________________________

From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
Rich, Dave
Sent: Friday, January 26, 2007 7:53 AM
To: sv-ec@eda-stds.org
Subject: [sv-ec] Update proposal for 1371 $exit

 

A new proposal has been uploaded reflecting the comments of the 1/22/07
sv-ec meeting.

 

David Rich
Verification Technologist
Design Verification & Test Division
Mentor Graphics Corporation
dave_rich@mentor.com
Office:   408 487-7206
Cell:     510 589-2625

 


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