RE: [sv-ec] Query regarding illegal bins

The 'iff' clause is not guarding the existence of a bin, it just guards
whether the bin get incremented on a sample. So according to your
example, there would always be 3 bins participating in the coverage.

If you are still counting ignored_bin values even without using it for
final coverage, then the iff clause might still be useful.

> -----Original Message-----
> From: Abhishek Tiwari [mailto:atiwari@cadence.com]
> Sent: Wednesday, June 21, 2006 12:18 AM
> To: Rich, Dave
> Cc: sv-ec@eda-stds.org
> Subject: Re: [sv-ec] Query regarding illegal bins
> 
> Hi Rich,
> 
> Ignore_bins and illegal bins are part of the coverage calculation
since
> they reduce the total bin space.
> The link you have sent explains this. For example consider below code
> mentioned in your link.
> 
> bit [2:0] a,b;
> covergroup ct;
> coverpoint b {
> option.auto_bin_max = 4;
> ignore_bins ig = { [0:1], [5:6] };
> }
> 
> In this case there are total of 4 automatic bins
> auto[0]= (0,1)
> auto[1] = (2,3)
> auto[2] = (4,5)
> auto[3] = (6,7)
> 
> if there would not have been any ignore bins then total bin space
would
> have been 4.
> But due to presence of ignore bins total bin space is = 4 - 1 = 3
(since
> 1 bin namely auto[0] became empty).
> 
> Now my question was if ignore bin had an iff condition , which is true
> sometimes and false sometimes then what will
> be total bin sapce. For example in above case , if we have
> ignore_bins ig = { [0:1], [5:6] } iff(x);
> 
> and 'x' is false some times and true some times during sampling , then
> total bin sapce will be 4 or 3.
> 
> Thanks
> Abhishek
> 
> Rich, Dave wrote:
> 
> >Abhishek,
> >
> >The bin guard expression only serves to prevent incrementing the bin
> >counter, it does not change bin structure. Since ignore_bins and
> >illegal_bins aren't part of the coverage calculation, the guard has
no
> >effect on the final coverage. You may want to look at
> >http://www.eda-stds.org/svdb/bug_view_page.php?bug_id=0001237.
> >
> >Dave
> >
> >
> >
> >
> >>-----Original Message-----
> >>From: owner-sv-ec@server.eda-stds.org
[mailto:owner-sv-ec@server.eda-
> >>stds.org] On Behalf Of Abhishek Tiwari
> >>Sent: Tuesday, June 20, 2006 8:41 AM
> >>To: sv-ec@server.verilog.org
> >>Subject: [sv-ec] Query regarding illegal bins
> >>
> >>Hi
> >>
> >>I have a query regarding 'iff' with illegal bins .
> >>
> >>Consider the following example:
> >>
> >>coverpoint a {
> >>  bins b1[] = {0, 1, 2, 3};
> >>  illegal_bins il_bins = {0} iff x+y;  // Note guard expression
> >>}
> >>
> >>Now, as per LRM, bins are effective only when guard expression
> >>evaluates to true. I believe this will apply for
> >>illegal_bins/ignore_bins. If
> >>that is the case, values 0 will only be ignored iff "x+y"
> >>is true while sampling. Now, it may happen that value 0 is ignored
> >>during one sampling event (x+y true) and not ignored (x+y false)
> >>during another sampling event.
> >>
> >>In such scenario, LRM does not specify how to calculate the final
> >>coverage.
> >>
> >>Thanks
> >>Abhishek
> >>
> >
> >
> >
> >