RE: [sv-ec] Scope resolution operator (::) to access class parameter assignments

6.1 defines 'data objects': "There are several forms of data in
SystemVerilog: literals (see Clause 3), parameters, constants,
variables, nets,

and attributes (see 4.17). A data object is a named entity that has a
data value associated with it, such as a parameter, a

variable, or a net."

 

Would the combination of data objects and data types do it?

 

Shalom

 

 

________________________________

From: owner-sv-ec@server.eda-stds.org
[mailto:owner-sv-ec@server.eda-stds.org] On Behalf Of Rich, Dave
Sent: Wednesday, June 21, 2006 9:24 AM
To: Brad Pierce; sv-ec@server.eda-stds.org
Subject: RE: [sv-ec] Scope resolution operator (::) to access class
parameter assignments

 

This brings up a related issue. Section 7.3 should define a class
property to include thing other than "data fields". It should be defined
to include variables, data types and parameters.

 

Dave

 

________________________________

From: owner-sv-ec@server.eda-stds.org
[mailto:owner-sv-ec@server.eda-stds.org] On Behalf Of Brad Pierce
Sent: Monday, June 19, 2006 11:35 PM
To: sv-ec@server.eda-stds.org
Subject: [sv-ec] Scope resolution operator (::) to access class
parameter assignments

 

Is it legal to access a parameter of a class specialization using the
scope resolution operator (::)?

 

For example, near the end of 7.23, would it be legal to refer to the
following?

 

                         Stack4::T::size

 

I would've assumed 'yes', but this is not explicitly mentioned in 7.21
and there are no examples of such usage in 7.23.

 

-- Brad