RE: [sv-ec] How do I record coverage information of Fibonacci series, using covergroup

Hi Arturo,
 
Thanks for the alternate methods you mentioned! They are generally
helpful.
 
However, my requirement is configurability of covergroup, thorough
parameters(s). I think its important at times to model such configurable
coverage points, considering the re-usability / portability of code.
Especially for the IP developers, the configurability / reusability /
portability are important attributes. The IP has to be used for
different applications, where the range of values to be covered are
application dependent. There could be number of such applications, where
the coverpoint has scattered spectrum like: one-hot/one-cold,
even-parity, fixed number of asserted bits etc. How do you think? Can
this enhancement request be considered? 
 
 
Thanks & regards,
 
Tapan. 

"You must be the change you want to see in the world" : Mahatma Gandhi 
  

 


________________________________

	From: Arturo Salz [mailto:Arturo.Salz@synopsys.com] 
	Sent: Saturday, July 02, 2005 3:40 AM
	To: Tapan Kapoor; sv-ec@eda.org
	Cc: Sandeep Pagey
	Subject: Re: [sv-ec] How do I record coverage information of
Fibonacci series, using covergroup
	
	
	Tapan,
	 
	What you are proposing is an interesting enhancement to the
auto-bining capabilities of the language.
	Currently, the way to specify non-consecutive bins is to use an
explicit (user-defined) set of bins.
	Pre-computing multiple sets of Fibinacci numbers and selecting
the appropriate one via a compiler 
	directive ('ifdef) is a possible way to implement this. A
generate statement might be another possibility, 
	but I believe it is harder to get that working for this
particular purpose.
	 
	    Arturo
	 
	----- Original Message ----- 
	From: Tapan Kapoor <mailto:tkapoor@cadence.com>  
	To: sv-ec@eda.org 
	Cc: Sandeep Pagey <mailto:pagey@cadence.com>  
	Sent: Friday, July 01, 2005 1:05 AM
	Subject: [sv-ec] How do I record coverage information of
Fibonacci series, using covergroup

	Hi,
	 
	The question is about System Verilog covergroup usage. How to
record coverage information of any design signal which has a
non-continuous spectrum like Fibonacci series? The range of Fibonacci
series is configurable through parameters i.e. two parameter MIN_VAL and
MAX_VAL. These parameters provide bounds for the value-distribution of
the signal, which means the range would differ from application to
application. If I use whole range in the bin definition, as shown in the
code fragment below:
	-----------------------------------------------
	integer fib_signal;
	always @ (input_data)
	        fib_signal = input_data;
	 
	covergroup fibonacci_cover @ (posedge clock)
	        rec: coverpoint fib_signal
	        {
	            bins data[] = {[MIN_VAL:MAX_VAL]};
	        }
	endgroup
	------------------------------------------------
	the numbers which are not in the fibonacci series appear as
holes, since they are never likely to appear. Alternatively, if there
were a construct to define bin-range through a function as below:
	----------------------
	    bins data[] = fibonacci_function(MIN_VAL, MAX_VAL)
	----------------------
	where the function "fibonacci_function" is repetitively invoked
to get all the fibonacci values within the range, it would help defining
the range accurately. 
	 
	Please suggest if there is a way to code the above-described
functionality within the existing language. OR is it possible to include
the above sort of construct in the covergroup. It would be useful for
many other application where the input data-stream is non-continuous
spectrum like recording even-parity, odd-parity, one-hot etc.
	 
	 
	Thanks & regards,
	 
	Sandeep / Tapan. 
	 
	 

	"You must be the change you want to see in the world" : Mahatma
Gandhi