RE: [sv-ec] Quick poll for AMS extension to overload modules

You're correct, I did not look at it closely enough before.

I still don't think the description of paramsets in the AMS document
sounds like it does this.

Shalom

On Wed, 16 Jun 2004, Brad Pierce wrote:

> Shalom,
>
> The example in 23.2 of SV 3.1a LRM uses conditional generate
> to choose which kind of module to instantiate based on a
> type parameter --
>
> typedef bit [12:0] T ;
> T A_bus, B_bus ;
> parameter type bus_t = T;
> generate
> case ($typeof(bus_t))
> $typeof(T):
> add_fixed_int #(T) (A_bus, B_bus);
> $typeof(real):
> add_float #(T) (A_bus, B_bus);
> endcase
> endgenerate
>
> -- Brad
>
>

-- 
Shalom Bresticker                         Shalom.Bresticker @freescale.com
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