RE: [sv-ec] Quick poll for AMS extension to overload modules

Shalom,

The example in 23.2 of SV 3.1a LRM uses conditional generate
to choose which kind of module to instantiate based on a
type parameter --

  typedef bit [12:0] T ;
  T A_bus, B_bus ;
  parameter type bus_t = T;
  generate
    case ($typeof(bus_t))
      $typeof(T):
            add_fixed_int #(T) (A_bus, B_bus);
      $typeof(real):
            add_float #(T) (A_bus, B_bus);
    endcase
  endgenerate

-- Brad
Received on Wed Jun 16 08:49:29 2004