Subject: Re: Another AMS issue
From: sv-xx@grfx.com
Date: Tue Jul 09 2002 - 23:12:24 PDT
> From - Mon Jul 8 19:08:30 PDT 2002
....
>
> Anyway, the current questions are:
>
> Will 'wreal' be acceptable in a future SystemVerilog?
>
> If not would 'wire <typedef>' be acceptable? (depracating wreal in Verilog-A)
Note: since SystemVerilog supports typedefs if "wire <typedef>" is acceptable you
could use -
typedef wire real wreal;
- to get a "wreal" type for backward compatibility.
Kev.
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